Unit-I
VHDL Modeling and Design Flow
Introduction to VLSI: complete VLSI design flow
(with reference to an EDA tool). Sequential, Data
flow, and Structural Modeling. Functions.
Procedures, attributes. Test benches,
Synthesizable, and non synthesizable
statements; packages and configurations
Modeling in VHDL with examples of circuits such
as counters, shift registers, bidirectional bus, etc.
Unit 2 FSM And Sequential Logic Principles Sequential Circuits, Meta-stability Synchronization, Design of Finite State Machines, and State minimization, FSM CASE STUDIES - Traffic Light control. Lift Control and UART STA and DTA
Unit 3 Programmable Logic Devices Introduction to the CPLDs, Study of architecture of CPLD. and Study of the Architecture of FPGA
Unit 4 System On Chip One, two phase clock, Clock distribution. Power distribution. Power optimization, SRC and DRC, Design validation, Global routing, Switch box routing. Off chip connections, I/O Architectures, Wire parasitics, EMI immune design. Study of memory-Basics of memory includes types of memory cells and memory architectures. Types of memory, based on architecture specific and application specific viz. SRAM, DRAM, SDRAM, FLASH, FIFO.
Unit 5 CMOS VLSI CMOS parasitics, equivalent circuit, body effect, Technology Scaling, A. parameter. Detail study of Inverter Characteristics, power dissipation, power delay product, CMOS combinational logic design and W/L calculations. Transmission gates, Introduction to CMOS layout.
Unit 6 Testability Need of Design for testability, Introduction to Fault Coverage, Testability. Design- for- Testability, Controllability and Observability, Stuck-at Fault Model. Stuck-Open and Stuck-Short faults. Boundary Scan check. JTAG technology; TAP Controller and TAP Controller State Diagram. Scan path. Full and Partial scan. BIST
Text Books 1. John F. Wakerly, "Digital Design, Principles and Practices", Prentice Hall Publication 2. Neil H. E Weste and Kamran Eshraghian, "Principles of CMOS VLSI Design". 3. Wayne Wolf, "Modern VLSI Design" 4. Sudhkar Yalamachalli, "Introductory VHDL from simulation to Synthesis"
Unit 2 FSM And Sequential Logic Principles Sequential Circuits, Meta-stability Synchronization, Design of Finite State Machines, and State minimization, FSM CASE STUDIES - Traffic Light control. Lift Control and UART STA and DTA
Unit 3 Programmable Logic Devices Introduction to the CPLDs, Study of architecture of CPLD. and Study of the Architecture of FPGA
Unit 4 System On Chip One, two phase clock, Clock distribution. Power distribution. Power optimization, SRC and DRC, Design validation, Global routing, Switch box routing. Off chip connections, I/O Architectures, Wire parasitics, EMI immune design. Study of memory-Basics of memory includes types of memory cells and memory architectures. Types of memory, based on architecture specific and application specific viz. SRAM, DRAM, SDRAM, FLASH, FIFO.
Unit 5 CMOS VLSI CMOS parasitics, equivalent circuit, body effect, Technology Scaling, A. parameter. Detail study of Inverter Characteristics, power dissipation, power delay product, CMOS combinational logic design and W/L calculations. Transmission gates, Introduction to CMOS layout.
Unit 6 Testability Need of Design for testability, Introduction to Fault Coverage, Testability. Design- for- Testability, Controllability and Observability, Stuck-at Fault Model. Stuck-Open and Stuck-Short faults. Boundary Scan check. JTAG technology; TAP Controller and TAP Controller State Diagram. Scan path. Full and Partial scan. BIST
Text Books 1. John F. Wakerly, "Digital Design, Principles and Practices", Prentice Hall Publication 2. Neil H. E Weste and Kamran Eshraghian, "Principles of CMOS VLSI Design". 3. Wayne Wolf, "Modern VLSI Design" 4. Sudhkar Yalamachalli, "Introductory VHDL from simulation to Synthesis"


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